The present invention relates to a measuring device measuring characteristics of a data transmission system with high accuracy and a clock regenerating circuit used therein, and in particular, to a measuring device adopting a technique for correctly regenerating a clock signal, from a data signal formed from RZ method bit codes, even during a period in which the data signal continues for a plurality of bits at the same level, and measuring, with high accuracy, the error ratio, jitter, wander characteristics, or the like accompanying transmission of the data signal, and to a clock regenerating circuit used therein.
Generally, in a data transmission system transmitting data signals or a measuring device or the like carrying out measurement of the jitter characteristic or the like of the data transmission system, the codes of the data signal are read and measurement of the jitter or wander characteristic is carried out, by a clock signal regenerated from the data signal.
FIG. 9 is a block diagram showing a configuration of a conventional clock regenerating circuit 10 used in such a measuring device.
In FIG. 9, a data converter 11 converts data signal Da inputted by the NRZ (Non Return to Zero) method to data signal Db of the RZ (Return to Zero) method.
Here, the RZ method is a method once returning the amplitude of the data signal to a reference level between some bit code and the next bit code.
Further, the NRZ method is a method not returning the amplitude of the data signal to the reference level between some bit code and the next bit code.
Further, in usual data transmitting systems, transmission of data is carried out by the NRZ method is since variations of the level are few even in the case of the similar code array.
The data converter 11 generates and outputs a pulse of a predetermined width synchronized with the rising timing of the data signal Da inputted by the NRZ method and the inverted signal of the data signal Da.
For example, as shown in FIG. 10A, when the NRZ method data signal Da corresponding to a code array of 0, 1 is inputted, as shown in FIG. 10B, the RZ method data signal Db, formed from a pulse train having a predetermined width synchronized with the rise and fall of the data signal Da, is outputted from the data converter 11.
Here, the data signal Db, within a period in which the codes of the data signal Da are inverted at each bit, is a pulse train which rises to a high level and returns to a low level at each code.
Further, the data signal Db, within a period in which the codes of the data signal Da are equal and continue, keeps a low level.
Accordingly, if the data signal Db is used as a clock signal, the clock signal is absent for the period in which the codes of the data signal Da are equal and continue.
If there is such an absence period, there is the problem that operation at the side of another circuit using the clock signal cannot be ensured.
Therefore, in a conventional clock regenerating circuit 10, as shown in FIG. 9, due to a delay adding circuit 12 being provided at a subsequent stage of the data converter 11, absence of the clock signal as described above is compensated for.
In an OR circuit (adding circuit) 12b, the delay adding circuit 12 logically-adds the data signal Db outputted by the RZ method from the data converter 11 and a signal Dbxe2x80x2 in which the data signal Db is delayed by a predetermined time T by a delay circuit 12a, and outputs them.
Here, for example, the delay time T of the delay circuit 12a is set to an integer multiple of a period Tc of the clock signal to be regenerated. For example, if the delay time T=Tc, the data signal Dbxe2x80x2, in which the data signal Db is delayed by one clock as shown in FIG. 10C, is outputted from the delay circuit 12a. 
Further, as shown in FIG. 10D, the logical sum of the data signal Db and the data signal Dbxe2x80x2, in which the data signal Db is delayed by one clock, is outputted from the OR circuit 12b. 
The output shown in FIG. 10D is a signal where pulses are inserted one by one in each period in which a pulse train is not outputted in FIG. 10B. If this is made to be the clock signal, the absence periods can be eliminated or shortened.
However, as described above, when the delay time T of the delay circuit 12a of the delay adding circuit 12 is set to the period Tc of the clock signal as described above, because only one pulse can be supplemented at the head of each absence period, there is the problem that the effect of shortening the absence period is low.
In order to resolve the above, further shortening of the absence period of the clock signal by providing the delay adding circuit 12 at a plurality of steps in series as a clock regenerating circuit 10xe2x80x2 shown in FIG. 11, is considered.
However, there are the problems that, here, the configuration as the clock regenerating circuit becomes complicated, and further, phase fluctuations occur in the regenerated clock signal due to variations or dispersion of the delay time T in each step, and identification of data and measurement of jitter or the like by the clock signal cannot be correctly carried out.
On the other hand, in Jpn. Pat. Appln. KOKAI Publication Nos. 11-313052 and 2000-197049, clock regenerating circuits are disclosed, regenerating a clock signal by using a band-pass filter having a predetermined band characteristic for extracting a clock signal component from an inputted data signal, and a saturation amplifier or an AGC amplifier amplifying the clock signal component extracted by the band-pass filter to a predetermined level.
However, if a portion, in which the same code component continues markedly, exists in the data signal inputted to such a clock regenerating circuit, in the clock signal outputted from the band-pass filter, as shown in FIG. 12A, in addition to an original clock signal component a, various noise components b, c, d, e, or the like based on relaxation vibrations at the interior of the band-pass filter described later are superposed and appear.
Here, relaxation vibrations at the interior of the band-pass filter are, when a period in which the same code component continues extremely exists in the data signal, a vibration phenomenon at the interior of the band-pass filter with respect to the data signal inputted until immediately before that period, as shown in FIG. 12B.
Such various noise components b, c, d, e, or the like based on relaxation vibration at the interior of the band-pass filter appear during the period when relaxation vibrations exist.
The relaxation vibration at the interior of the band-pass filter depends on wideness/narrowness of the band characteristic of the band-pass filter.
Namely, when the band characteristic of a band-pass filter extracting, from a data signal transmitted at a predetermined carrier wave frequency, a signal component having the same frequency as the clock signal to be regenerated, is regulated to a narrow band characteristic in accordance with the aforementioned predetermined carrier wave frequency, relaxation vibration at the interior of the band-pass filter markedly appears.
In accordance therewith, in the clock signal outputted from the saturation amplifier or the AGC amplifier, as shown in FIG. 12C, in addition to the original clock signal component axe2x80x2, various noise components bxe2x80x2, cxe2x80x2, dxe2x80x2, exe2x80x2, or the like are superposed and appear.
Further, in the period in which relaxation vibration at the interior of the band-pass filter exists, such a saturation amplifier or AGC amplifier works in a non-saturation region as shown in FIG. 12C.
Therefore, the device of the saturation amplifier or the AGC amplifier merely carries out waveform shaping, and the output in the period in which relaxation vibration at the interior of the band-pass filter exists is not identified as a clock signal. Therefore, the device has not the same code tolerance.
As a result, in the clock regenerating circuit regenerating the clock signal by using such a saturation amplifier or AGC amplifier, as shown in FIG. 12D, it cannot be correctly regenerated as a clock signal in the same code continuing period. Therefore, absence of the clock signal is caused, and phase fluctuations tend to occur easily in the regenerated clock signal.
Accordingly, in the same way as described above, in such a clock signal, there is the problem that identification of a data signal and measurement of jitter or the like cannot be correctly carried out.
An object of the present invention is to resolve the problems as described above, and to provide a measuring device which can correctly carry out measurement of an error ratio, jitter, wander, or the like accompanying transmission of a data signal due to occurrences of absence and phase fluctuations of a clock signal being able to be reliably prevented with a simple configuration.
Further, another object of the present invention is to provide a clock regenerating circuit for use in a measuring device which can correctly carry out measurement of an error ratio, jitter, wander, or the like accompanying transmission of a data signal due to occurrences of absence and phase fluctuations of a clock signal being able to be reliably prevented with a simple configuration.
In accordance with a first aspect of the present invention, there is provided a measuring device comprising:
a data converter (22) which converts a data signal transmitted at a predetermined carrier wave frequency from an NRZ method data signal to an RZ method data signal;
a band-pass filter (23) which extracts a signal component having a frequency the same as that of a clock signal to be regenerated from the RZ method data signal converted by the data converter, and has a predetermined band characteristic regulated in accordance with the predetermined carrier wave frequency;
a binarizing circuit (25) which binarizes, at a predetermined threshold value, the signal component extracted by the band-pass filter, and outputs a binarized signal as the clock signal to be regenerated, and when there is a period in which the data signal inputted to the band-pass filter continues for a plurality of bits at the same level, the binarizing circuit being configured so as to compensate for absence of the clock signal during the period by binarizing, at the predetermined threshold value, the signal which the band-pass filter outputs during the period due to relaxation vibration at an interior of the band-pass filter with respect to the data signal inputted until immediately before the period; and
calculating modules (33, 37, 38) which calculate at least one of an error ratio, jitter, and wander accompanying transmission of the data signal, based on the clock signal outputted from the binarizing circuit.
In accordance with a second aspect of the present invention, there is provided a measuring device according to the first aspect, wherein the measuring device is a device carrying out measurement of the error ratio, and
the calculating module, in an error measuring portion, comprises:
a code reading module (31) which reads a code of the NRZ method data signal based on the clock signal outputted from the binarizing circuit;
a code comparing module (32) which compares the code array read by the code read module with a reference code array; and
an error calculating module (33) which calculates the error ratio based on results of comparison of the code comparing module.
In accordance with a third aspect of the present invention, there is provided a measuring device according to the first aspect, wherein the measuring device is a device carrying out measurement of at least one of the jitter and the wander, and
the band-pass filter has a predetermined band characteristic regulated in accordance with the predetermined carrier wave frequency and measurement of at least one of the jitter and the wander;
when there is a period in which the data signal inputted to the band-pass filter continues for a plurality of bits at the same level, the binarizing circuit binarizes, at a threshold value corresponding to the measurement of at least one of the jitter and the wander, the signal which the band-pass filter outputs during the period due to relaxation vibration at the interior of the band-pass filter with respect to the data signal inputted until immediately before the period; and
the calculating module, in a jitter/wander measuring portion, comprises:
a phase difference detecting module (36) which detects a phase difference of the clock signal outputted from the binarizinq circuit and a reference clock signal; and
calculating modules (37, 38) which calculate at least one of the jitter and the wander based on the phase difference detected by the phase difference detecting module.
In accordance with a fourth aspect of the present invention, there is provided a measuring device according to the first aspect, wherein the band-pass filter and the binarizing circuit are made to be one circuit group and a plurality of the one circuit group are connected in series.
In accordance with a fifth aspect of the present invention, there is provided a measuring device according to the first aspect, further comprising:
an amplifier (24) which is provided between the band-pass filter and the binarizing circuit, and amplifies the signal component extracted by the band-pass filter and outputs it to the binarizing circuit.
In accordance with a sixth aspect of the present invention, there is provided a measuring device according to the first aspect, wherein the threshold value of the binarizing circuit is set to a threshold value voltage able to ensure a desired same code continuing tolerance.
In accordance with a seventh aspect of the present invention, there is provided a measuring device according to the first aspect, further comprising:
a phase difference detecting module (136) for calculating a threshold value, comprising: a phase synchronizing loop module (139) including a phase comparator (136A) which detects a phase difference between the clock signal outputted from the binarizing circuit and the reference clock signal and a voltage controlling oscillator module (138) which outputs a signal having a predetermined frequency as the reference clock signal to the phase comparator based on a voltage output corresponding to the phase difference detected by the phase comparator 136A; and a clock signal absence detecting module (140) which detects absence of the clock signal during the period in the clock signal outputted from the binarizing circuit based on the phase difference detected by the phase comparator 136A of the phase synchronizing loop module; and
a threshold value calculating module (143) which calculates an optimal threshold value to compensate for absence of the clock signal during the period in the binarizing circuit and supplies it to the binarizing circuit, based on the voltage output corresponding to the phase difference detected by the phase comparator of the phase difference detecting module for calculating the threshold value, when absence of the clock signal during the period is detected by the clock signal absence detecting module of the phase difference detecting module for calculating the threshold value.
In accordance with an eighth aspect of the present invention, there is provided a measuring device according to the seventh aspect, wherein the measuring device is a device carrying out measurement of at least one of the jitter and the wander, and
the band-pass filter has a predetermined band characteristic regulated in accordance with the predetermined carrier wave frequency and measurement of at least one of the jitter and the wander;
when there is a period in which the data signal inputted to the band-pass filter continues for a plurality of bits at the same level, the binarizing circuit binarizes, at a threshold value corresponding to the measurement of at least one of the jitter and the wander, the signal which the band-pass filter outputs during the period due to relaxation vibration at the interior of the band-pass filter with respect to the data signal inputted until immediately before the period;
the calculating module, in a jitter/wander measuring portion (35), comprises:
a phase difference detecting module (36) which detects a phase difference of the clock signal outputted from the binarizing circuit and a reference clock signal; and
calculating modules (37, 38) which calculate at least one of the jitter and the wander based on the phase difference detected by the phase difference detecting module; and
the phase difference detecting module (36) of the jitter/wander measuring portion is also used as the phase difference detecting module (136) which calculates the threshold value.
In accordance with a ninth aspect of the present invention, there is provided a clock regenerating circuit for use in a measuring device measuring at least one of an error ratio, jitter, and wander accompanying transmission of a data signal, based on a clock signal outputted from a binarizing circuit, the clock degenerating circuit comprising:
a data converter (22) which converts a data signal transmitted at a predetermined carrier wave frequency from an NRZ method data signal to an RZ method data signal;
a band-pass filter (23) which extracts a signal component having a frequency the same as that of a clock signal to be regenerated from the RZ method data signal converted by the data converter, and has a predetermined band characteristic regulated in accordance with the predetermined carrier wave frequency; and
a binarizing circuit (25) which binarizes, at a predetermined threshold value, the signal component extracted by the band-pass filter, and outputs a binarized signal as the clock signal to be regenerated, and when there is a period in which the data signal inputted to the band-pass filter continues for a plurality of bits at the same level, the binarizing circuit being configured so as to compensate for absence of the clock signal during the period by binarizing, at the predetermined threshold value, the signal which the band-pass filter outputs during the period due to relaxation vibration at an interior of the band-pass filter with respect to the data signal inputted until immediately before the period.
In accordance with a tenth aspect of the present invention, there is provided a clock regenerating circuit according to the ninth aspect, wherein when the measuring device is a measuring device carrying out measurement of at least one of the jitter and the wander,
the band-pass filter has a predetermined band characteristic regulated in accordance with the predetermined carrier wave frequency and measurement of at least one of the jitter and the wander; and
when there is a period in which the data signal inputted to the band-pass filter continues for a plurality of bits at the same level, the binarizing circuit binarizes, at a threshold value corresponding to the measurement of at least one of the jitter and the wander, the signal which the band-pass filter outputs during the period due to relaxation vibration at the interior of the band-pass filter with respect to the data signal inputted until immediately before the period.
In accordance with a eleventh aspect of the present invention, there is provided a clock regenerating circuit according to the ninth aspect, wherein the band-pass filter and the binarizing circuit are made to be one circuit group and a plurality of the one circuit group are connected in series.
In accordance with a twelfth aspect of the present invention, there is provided a clock regenerating circuit according to the ninth aspect, further comprising:
an amplifier (24) which is provided between the band-pass filter and the binarizing circuit, and amplifies the signal component extracted by the band-pass filter and outputs it to the binarizing circuit.
In accordance with a thirteenth aspect of the present invention, there is provided a clock regenerating circuit according to the ninth aspect, wherein the threshold value of the binarizing circuit is set to a threshold value voltage able to ensure a desired same code continuing tolerance.
In accordance with a fourteenth aspect of the present invention, there is provided a clock regenerating circuit according to the ninth aspect, further comprising:
a phase difference detecting module (136) for calculating a threshold value, comprising: a phase synchronizing loop module (139) including a phase comparator (136A) which detects a phase difference between the clock signal outputted from the binarizing circuit and the reference clock signal and a voltage controlling oscillator module (138) which outputs a signal having a predetermined frequency as the reference clock signal to the phase comparator based on a voltage output corresponding to the phase difference detected by the phase comparator; and a clock signal absence detecting module (140) which detects absence of the clock signal during the period in the clock signal outputted from the binarizing circuit based on the phase difference detected by the phase comparator of the phase synchronizing loop module; and
a threshold value calculating module (143) which calculates an optimal threshold value to compensate for absence of the clock signal during the period in the binarizing circuit and supplying it to the binarizing circuit, based on the voltage output corresponding to the phase difference detected by the phase comparator of the phase difference detecting module for calculating a threshold value, when absence of the clock signal during the period is detected by the clock signal absence detecting module of the phase difference detecting module for calculating a threshold value.
In accordance with a fifteenth aspect of the present invention, there is provided a clock regenerating circuit according to the fourteenth aspect, wherein when the measuring device is a device carrying out measurement of at least one of the jitter and the wander,
the band-pass filter has a predetermined band characteristic regulated in accordance with the predetermined carrier wave frequency and measurement of at least one of the jitter and the wander;
when there is a period in which the data signal inputted to the band-pass filter continues for a plurality of bits at the same level, the binarizing circuit binarizes, at a threshold value corresponding to the measurement of at least one of the jitter and the wander, the signal which the band-pass filter outputs during the period due to relaxation vibration at the interior of the band-pass filter with respect to the data signal inputted until immediately before the period;
the calculating module, in a jitter/wander measuring portion (35), comprises:
a phase difference detecting module (36) which detects a phase difference of the clock signal outputted from the binarizing circuit and a reference clock signal; and
calculating modules (37, 38) which calculate at least one of the jitter and the wander based on the phase difference detected by the phase difference detecting module; and
the phase difference detecting module (36) of the jitter/wander measuring portion (35) is also used as the phase difference detecting module (136) for calculating a threshold value.